A fin metal-oxide-semiconductor field effect transistor (FinMOSFET, or finFET) provides solutions to metal-oxide-semiconductor field effect transistor (MOSFET) scaling problems at, and below, the 45 nm node of semiconductor technology. A finFET comprises at least one narrow (preferably <30 nm wide) semiconductor fin gated on at least two opposing sides of each of the at least one semiconductor fin. Prior art finFET structures are typically formed on a semiconductor-on-insulator (SOI) substrate, because of low source/drain diffusion to substrate capacitance and ease of electrical isolation by shallow trench isolation structures.
A feature of a finFET is a gate electrode located on at least two sides of the channel of the transistor. Due to the advantageous feature of full depletion in a finFET, the increased number of sides on which the gate electrode controls the channel of the finFET enhances the controllability of the channel in a finFET compared to a planar MOSFET. The improved control of the channel allows smaller device dimensions with less short channel effects as well as larger electrical current that can be switched at high speeds. A finFET device has faster switching times, equivalent or higher current density, and much improved short channel control than the mainstream CMOS technology utilizing similar critical dimensions.
In a typical finFET structure, at least one horizontal channel on a vertical sidewall is provided within the semiconductor “fin” that is set sideways, or edgewise, upon a substrate. Typically, the fin comprises a single crystalline semiconductor material with a substantially rectangular cross-sectional area. Also typically, the height of the fin is greater than width of the fin to enable higher on-current per unit area of semiconductor area used for the finFET structure. In order to obtain desirable control of short channel effects (SCEs), the semiconductor fin is thin enough in a device channel region to ensure forming fully depleted semiconductor devices. Typically, the thickness, or the horizontal width, of a fin in a finFET is less than two-thirds of its gate length in order to obtain good control of the short channel effect.
One of the challenges for a finFET is the difficulty of introducing stress into the channel to enhance the mobility of charge carriers. Formation of an embedded stress-generating structure in a fin is difficult the fin typically protrudes above an insulator surface and does not have lateral support. Formation of a stress generating liner over a fin generates stress in the widthwise direction of the fin, but is not effective in generating stress in lengthwise direction. However, charge carrier mobility is improved for longitudinal stress for many crystallographic orientations of semiconductor materials.
In view of the above, there exists a need to provide a fin field effect transistor providing substantial longitudinal stress, i.e., stress along the direction of current flow, for enhancing device performance, and methods of manufacturing the same.